Manuscript details
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Release date:2024-03-20 Number of views:628 Amount of downloads:493 DOI:10.19457/j.1001-2095.dqcd24583
Abstract: The semi-bridgeless dual Boost power factor correction(PFC)circuit can obtain higher conversion
efficiency without increasing common mode noise,but the return current of the input AC terminal produces
additional losses on the introduced diodes,which reduces the conversion efficiency. The replacement of diodes with
MOS transistors was investigated. The MOS transistor was with very low impedance when turned on to short-circuit
the MOS transister(or its body diode)and the inductor branch in parallel. Most of the return current was flowed
through the introduced MOS transistor,the conduction loss was reduced and the conversion efficiency was
improved. At the same time,a low impedance path was provided for the common mode noise through the MOS
transistor and its body diode,and the commonmode noise level was not changed. The working process and design
criteria of the circuit were given,and the correctness of the analysis was verified by circuit simulation. Finally,a 1.5
kW principle prototype was developed,in which it was verified that the circuit can further improve the conversion
efficiency.
Key words: semi-bridgeless power factor correcttion;self-drive synchronous rectifier;high efficiency
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